The present invention relates generally to the field of computer graphics, most particularly to the field of Video Graphics Array (VGA) type computer graphics.
VGA graphics controllers are commonly employed to provide color graphics capabilities for personal computers with architectures based on the 80.times.86 family of microprocessors. One of the more common of these architectures is that of the "AT" type personal computer. VGA graphics controller cards are generally memory mapped devices, for which graphic display is controlled by AT system bus memory writes to the VGA controller card. The speed with which the VGA controller card can process a memory write and become available for another memory write is a determinative factor in its performance capabilities.
When the system bus writes to a memory mapped device, it waits for a predetermined cycle time, a multiple of the period of the bus clock, to allow the device to receive and process the data, before performing any more writes. Many VGA graphics controllers are of a class of devices that exchange data with the system bus in eight bit groups; for such eight bit devices the default AT write cycle time is six bus clock periods, which for a standard 8 Mhz clock comes to 750 ns. Other VGA controllers are 16 bit devices, for which the default write cycle is 3 clock periods. Even though VGA controllers may not always be able to process a memory write within this default cycle time, the default may still be used because of the existence of an override signal on the AT bus. If the controller needs more than the default number of periods, it asserts a /Ready (not-ready) override signal on the AT bus, by drawing it low. The microprocessor will then extend the write cycle until /Ready is released. Some VGA controllers have been further equipped with a selectable write buffer, to minimize the likelihood that /Ready will be needed, but further increases in speed are desired.